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What Memory Bandwidth Actually Buys You: LLM Inference Hardware in 2026

A first-principles guide to inference hardware from desk to rack — M5 Max, DGX Spark clusters, prosumer PCs, RTX PRO 6000, Lenovo 8× H200/B200 nodes, AMD Instinct, plus prefill vs decode math, VRAM sizing, and API vs rent vs own TCO.

July 28, 202617 min read

PrefillDecodeRoofline, HardwareTierMatrix, MemoryBudgetBreakdown, SparkTopologyDiagram, InferenceTcoComparison, HardwareNativeStack, } from "@/components/blog/local-llm-hardware";

TL;DR

  • This is an inference guide. Training is compute-and-fabric bound; decode is memory-bandwidth bound. Do not size a chat box like a training cluster.
  • Capacity and speed are different purchases. M5 Max 128GB and DGX Spark buy unified memory; RTX PRO 6000 and H200/B200 buy decode bandwidth; interconnect only helps when the model truly will not fit.
  • VRAM math is weights (P × bytes × ~1.2) plus KV (context × users). Concurrent long-context sessions ambush GQA models; MLA caches collapse that bill.
  • Desk ladder: M5 Max, Spark 1/2/8, 256GB PC with 24–32GB VRAM, 1× PRO 6000. Datacenter ladder: Lenovo-anchored 8× PRO 6000 / H200 / B200 / B300, GB200 NVL ceiling, AMD MI300X/MI350X.
  • Bare metal only pays with hardware-native runtimes — FlashAttention, PagedAttention, NVFP4/MLX/ROCm paths. Naive runners leave most of the silicon idle.
  • At lab volume, APIs or a single desk box win. At sustained hundreds of millions of tokens per day, owned HBM nodes beat frontier list pricing — if you fill them, staff them, and open weights clear your quality bar.
Editorial dark photograph suggesting desk-to-rack AI inference hardware scale

Cloud APIs are the correct way to start. They stay the correct way for bursty work, frontier-only quality floors, and anything you have not decided to own yet. They stop being cheap the moment volume is steady, data cannot leave the boundary, or you are paying for idle capacity you already decided you need every day.

Buying silicon does not automatically fix that. The common failure mode in 2026 is confusing fits with feels fast. A 70B model that loads into 128GB unified memory and crawls at a few tokens per second is not a serving win. It is a capacity demo.

This post is about inference — chat, agents, RAG, batch eval. Training gets one contrast, then we move on. The math below is what I use when someone asks whether to buy a Mac, a Spark, a PRO 6000 workstation, or a Lenovo 8-GPU node.

Scope: inference, not training

Training is compute-bound and fabric-hungry. Gradients sync across the cluster every step. That is why InfiniBand fat-trees and NVLink domains show up in training BOMs.

Inference is different. Weights are mostly static. Prefill is matrix–matrix work (FLOPS). Decode at low batch is memory-bandwidth work (bytes per token). If the model fits in one chassis, you do not need a training interconnect to answer chat. You need enough fast memory, enough bandwidth, and a runtime that does not waste either.

If you are sizing InfiniBand for a decode problem, stop. Re-read the next two sections first.

Prefill vs decode

Prefill turns the prompt into KV cache. It is usually compute-bound. Time-to-first-token tracks FLOPS, kernel quality, and how long the prompt is.

Decode emits tokens one by one. At batch size one, the accelerator streams roughly the active weight footprint from memory every token. That is why a card with fewer FLOPS but much higher memory bandwidth can feel faster for interactive chat than a FLOPS monster sitting on slow DRAM.

Prefill vs Decode — What Actually Binds

Prefill is usually compute-bound. Decode at low batch is usually memory-bandwidth-bound. Topology decides which cliff you hit.

Prefill → TTFT

Compute-bound (GEMM)

Matrix–matrix work. FLOPS and activation bandwidth matter. Long prompts add attention IO.

Decode → tok/s

Bandwidth-bound (batch ≈ 1)

Stream active weights every token. More TFLOPS alone rarely helps until batching or speculation raises intensity.

Binding constraint — Discrete VRAM

Prefill: FLOPS-bound while weights stay resident in GDDR/HBM.

Decode: tok/s ≈ η × bandwidth / bytes-per-token. GDDR/HBM wins.

Fit in VRAM = fast path. Miss = cliff.

A useful first-order decode ceiling (batch ≈ 1, dense, short context):

tok/s ≈ η × (memory_bandwidth / bytes_streamed_per_token)

η is efficiency — call it 0.5–0.8 in real runtimes. MoE helps here: you must reside total parameters, but you only stream active experts per token. A 671B MoE with 37B active streams ~22 GB per token at Q4; a dense 70B streams ~42 GB. The model ten times larger on disk can decode faster, as long as every expert stays in fast memory.

Memory tierOrder-of-magnitude BWWhat decode feels like
HBM3e (H200/B200-class)~4.8–8 TB/sInteractive multi-user when the model fits
GDDR7 (PRO 6000 / 5090-class)~1.6–1.8 TB/sStrong single-stream when resident
Apple M5 Max unified614 GB/sGood single-user 70B; weak multi-tenant
DGX Spark unified273 GB/sFine for small models; 70B crawls
DDR5 system RAM~100 GB/sOffload tax — usable, not snappy
PCIe 5.0 path~64 GB/sLayer offload cliff
NVMe~7–14 GB/sCapacity of last resort
200 GbE fabric~25 GB/s payload-classMulti-node TP tax

Those decode numbers are planning estimates, not lab benches. Measure your stack.

The math behind VRAM sizing

Compute is rarely the first wall. Memory capacity is. You need room for weights, KV cache, activations, and the framework’s bad habits.

Weights

W ≈ P × bytes_per_param × 1.2

P is parameter count. bytes_per_param is roughly 0.5 for Q4, 1.0 for Q8, 2.0 for FP16. The 1.2 factor is a planning buffer for runtime overhead — not a law of physics.

For MoE, P for capacity is total parameters. Decode streams closer to active parameters. Do not size CapEx on the marketing “active only” figure and then wonder why the model will not load.

KV cache (GQA-style)

KV ≈ batch × seq_len × 2 × layers × kv_heads × head_dim × bytes_per_elem

Concurrent users (batch) times context (seq_len) is what ambushes serving boxes. Run the numbers on a 70B GQA shape (80 layers, 8 KV heads, 128 head dim): ~320 KB per token at FP16. Eight users at 32K context is ~84 GB of KV — twice the Q4 weights.

KV cache (MLA — DeepSeek / Kimi lineage)

Multi-head Latent Attention caches a low-rank latent plus a small RoPE slice instead of full multi-head K/V. For a DeepSeek-V3-class model that works out to roughly 70 KB per token — versus ~320 KB for the 70B GQA shape above, on a model nearly ten times larger. On MLA architectures, long context is cheap relative to weight residency. Verify which attention mechanism you are buying hardware for before you optimize for the wrong cliff.

Memory Budget Breakdown

Planning math: weights = P × bytes; overhead ≈ 20% runtime buffer (the ×1.2); KV ≈ KB/token × context × users. GQA vs MLA KV shapes differ. Estimates — not engine-specific allocator truth.

Attention: GQAKV: ~320 KB/tokActive / total: 70B / 70B
Weights: 35.0(67%)
KV cache: 10.5(20%)
Overhead: 7.00(13%)

Total budget

~52.5

Decode streams / token

~35.0

Note

Llama-class GQA shape — desk vs PRO 6000 hinge

Hardware fit (≤92% of pool)

Smallest that clears: 1× RTX PRO 6000 96GB

PRO 6000 96GM5/Spark 128G2× Spark 256G8× PRO 768G8× H200 1.1T8× B200/MI300X 1.5T8× B300/MI350X 2.3T
Model classQ4 weights (×1.2)Q8 weights (×1.2)Decode streams (Q4)
Dense 7B~4.2 GB~8.4 GB~4.2 GB/tok
Dense 32B~19 GB~38 GB~19 GB/tok
Dense 70B~42 GB~84 GB~42 GB/tok
MoE ~100B / ~20B act.~60 GB~120 GB~12 GB/tok

Ladder A — Consumer / desk / lab

These are the machines people actually buy for local work in mid-2026. CapEx figures are planning anchors.

TierMemoryBandwidth~CapExBest forTrade-off
MacBook Pro M5 Max 128GB128GB UMA614 GB/s~$5.2–7.3kSingle-user 70B, agents, wattsNot multi-tenant; no CUDA
DGX Spark ×1128GB UMA273 GB/s~$4.7kCUDA stack, 8–20B interactive70B decode is bandwidth-starved
DGX Spark ×2~256GB pooled273 GB/s/node~$9.5k + DACCapacity for models that will not fit one boxFabric tax; PP often beats TP at 200G
DGX Spark ×8~1TB pooled273 GB/s/node~$40k + switchEducation / capacity demosNot a tok/s win narrative
PC: fast CPU, 256GB RAM, 24–32GB VRAM24–32GB + RAM offload1.0–1.8 TB/s GPU$4.5–7k≤32B full speed; cheap lab70B = hybrid offload tax
Workstation: 1× RTX PRO 6000 96GB96GB GDDR7~1.6–1.8 TB/s$12–18kSingle-card 70B–~120B + NVFP4Price, 600W, still one card

Apple note. The M3 Ultra 512GB Studio that anchored earlier guides is no longer orderable — the DRAM shortage reshuffled Apple's lineup, and as of mid-2026 the M5 Max 128GB MacBook Pro is the highest-memory Mac you can buy. Apple's published figure is 614 GB/s of unified memory bandwidth — but only on the 40-core-GPU M5 Max; the binned 32-core part runs 460 GB/s, so configure carefully. The 128GB/2TB inference config lands around $5.2k; maxing storage and display pushes it to $7,349. The per-GPU-core Neural Accelerators mainly help prefill, and decode still rides that bus. A Mac Studio M5 refresh is rumored for later this year — treat it as a rumor until it ships.

Spark note. Spark is NVIDIA’s GB10 personal AI supercomputer (ex–Project DIGITS): 128GB coherent unified memory at 273 GB/s, with a ConnectX-7 NIC onboard. Marketing petaFLOPS do not repeal 273 GB/s. Use it for the CUDA/vLLM/TRT-LLM path and models that fit the bandwidth envelope. Cluster it for capacity, not because eight boxes automatically mean eight times the chat speed.

Hardware Ladder Matrix

CapEx anchors are mid-2026 planning figures — not quotes.

TierMemoryBandwidth~CapExInterconnect70B fitStackBest for
M5 Max 128GB128GB UMA614 GB/s~$5.2–7.3kQ4–Q8 interactiveMLXSingle-user 70B, watts, privacy
DGX Spark ×1128GB UMA273 GB/s~$4.7kCX-7 200GFits; slow decodevLLM / TRT-LLMCUDA R&D, 8–20B fast
DGX Spark ×2~256GB pooled273 GB/s/node~$9.5k + DAC1× QSFP DACCapacity winPP / federatedModels that won't fit one box
DGX Spark ×8~1TB pooled273 GB/s/node~$40k + switchQSFP switchCapacity / educationNCCL / RoCECluster lessons, not tok/s
PC 256GB + 24–32GB24–32GB VRAM1.0–1.8 TB/s~$4.5–7kPCIeHybrid offloadllama.cpp / ExLlamaV3≤32B full-speed; cheap lab
1× RTX PRO 600096GB GDDR7~1.6–1.8 TB/s~$12–18k WSPCIe 5.0Fast, full-GPUTRT-LLM / vLLM NVFP4Single-card serving

Spark networking: cables are the product

Two Sparks want one certified QSFP DAC on the same physical port on each box. A second cable does not magically double throughput — the CX-7 is fed by aggregated PCIe Gen5 x4 paths with a real ceiling near 200 Gbps aggregate.

For three-plus nodes you need a switch. NVIDIA's Sync Cluster Assistant covers supported 2–4 node layouts; eight-node fabrics are community/manual territory. Practical checklist:

  • QSFP112 DAC, Ethernet-mode parts (NVIDIA's docs cite Amphenol NJAAKK-N911 and Luxshare LMTQF022-SD-R)
  • MTU 9000 on the fabric
  • NCCL_IB_MERGE_NICS=1 and correct HCA lists so both logical halves of the port participate
  • Management traffic on 10GbE, not the CX-7
  • Expect the “link shows 200G but iperf is ~13 Gbps” failure mode when firmware, power state, or cable class is wrong (widely reported in the Spark community; symptoms vary by firmware revision)

DGX Spark Topologies

ConnectX-7 quirks matter as much as node count. Cables and NCCL config decide whether the fabric works.

S1
1× QSFP DAC · 200G
S2
  • One QSFP DAC, same physical port on both boxes
  • Second cable does not double throughput (PCIe aggregation ceiling)
  • Prefer pipeline parallel for large models; federate models that fit one node

Federate models that fit on one node. Only shard when residency forces it. Idle CX-7 ports are not free tokens; they are unused CapEx.

Ladder B — Datacenter / production

When concurrency, SLA, and frontier open-weight residency matter, you leave the desk. I use Lenovo ThinkSystem as the OEM anchor so CapEx rows are comparable (LP2368 TCO guide). Dell and Supermicro ship peer SKUs — especially on AMD.

TierSiliconOEM anchorTotal GPU memoryInterconnectRole
Value multi-GPU8× RTX PRO 6000 Blackwell SESR650i V4 / SR675 V3768GB GDDR7PCIe 5.0Value production; NVFP4; agentic steady load
Hopper workhorse8× H200SR680a V3~1.13 TB HBM3eNVLink / HGXMature multi-user serving; widely rented
Blackwell production8× B200SR680a V3 / SR780a V3~1.4–1.5 TB HBM3eNVLinkHigh concurrency + native NVFP4
Blackwell Ultra8× B300SR680a V4~2.3 TB HBM3eNVLinkLong-context / dense capacity
Rack-scaleGB200 NVL72NVIDIA / OEM NVL racksRack NVLink domainNVLink SwitchBeyond single chassis — factory inference
AMD open path8× MI300XSR685a V3 (also Dell XE9680)1.5 TB HBM3Infinity FabricMemory pool + ROCm alternative
AMD next-gen8× MI350X / MI355XSupermicro H14 + peers~2.3 TB HBM3eInfinity FabricFP4/FP6 capacity; software maturity still the bet

Planning CapEx anchors from Lenovo’s 2026 TCO note (not quotes): ~$400k for 8× H200, ~$550k for 8× B200, ~$785k for 8× B300. An 8× RTX PRO 6000 Blackwell node runs roughly $135k–$200k depending on chassis and integrator — a third or less of the SXM nodes. That gap is the whole point of the value tier: same 768GB pool, slower memory, PCIe instead of NVLink.

PCIe vs NVLink. Eight PRO 6000s pool memory over PCIe. That is fine for many steady inference loads. Heavy tensor parallel under tight latency SLAs prefers an NVLink domain (H200/B200 SXM). Same VRAM number, different sync tax.

AMD. MI300X/MI350X compete on memory pool and $/GB. The honest tax is CUDA ecosystem gravity — ROCm + vLLM/SGLang is real in 2026, but your team’s muscle memory still matters. Pick AMD when the memory math and procurement story win, not as a protest vote.

Hardware-native optimization

Buying the card and running a stock Hugging Face generate loop can leave half or more of the silicon idle. The runtime has to match the hardware.

Hardware-Native Optimization

Bare metal only pays when the runtime matches the silicon. Naive runners leave most of the card on the table.

Production inference engine

vLLM · SGLang · TensorRT-LLM · MLX · llama.cpp / ExLlamaV3

FlashAttention

Cuts HBM↔SRAM traffic for long context. Helps TTFT and long-prompt decode attention IO.

All GPU tiers; critical on HBM and PRO 6000

PagedAttention / continuous batching

Treats KV like virtual memory pages. Multi-user concurrency without catastrophic fragmentation.

vLLM / SGLang on Spark, PRO 6000, H200/B200, Instinct

Compile to silicon

TensorRT-LLM + NVFP4 on Blackwell; MLX Neural Accelerators on M5; ROCm kernels on MI300X/350X.

Native precision paths beat generic PyTorch runners

Prefix / speculative tricks

Radix/prefix cache for agent loops; draft models for 1.5–3× when headroom exists.

SGLang agents; MLX/llama.cpp speculative on desk boxes

Practical stack map:

HardwarePrimary stackStretch
M5 Max 128GBMLX-LM (+ speculative when headroom)llama.cpp for long-prefill / GGUF portability
Spark 1–2vLLM or TRT-LLM + NVFP4; PP=2 for large dual-nodeFederate small models; NCCL playbooks for fabric
24–32GB + fat RAMExLlamaV3 or llama.cpp hybrid Q4Do not force vLLM for one user
PRO 6000 96GBTRT-LLM / vLLM NVFP4; ExLlamaV3 for single-stream peakSGLang if prefix/agent heavy
8× H200 / B200 / B300vLLM / TRT-LLM / NIM on NVLinkContinuous batching + prefix cache
MI300X / MI350XROCm + vLLM / SGLangValidate your model family on ROCm before CapEx

Myths worth killing: more nodes ≠ more tok/s; Q8 is not always better on bandwidth-bound boxes; Apple Neural Accelerators are not the Neural Engine; hybrid offload is not “having a 70B GPU.”

SOTA APIs vs rented GPUs vs on-prem

Three options. Same two volume anchors so the crossover is visible.

  • Team / lab: ~20M input + 5M output tokens/day
  • Sustained production: ~200M input + 50M output tokens/day

Option A — SOTA cloud APIs

ClassPlanning ratesData boundaryBest when
Frontier (OpenAI / Anthropic / Google-class)~$5/M in · ~$15/M out listLeaves your perimeter (ZDR and in-tenant offerings like Azure OpenAI / Bedrock narrow this, with their own pricing)Quality floor, bursty work, no CapEx
Near-frontier via gatewayOften 3–10× cheaperProvider / VPC dependentHigh volume with “good enough” OSS quality

At the sustained 250M tok/day mix, frontier APIs land near ~$640k/year at list rates and scale linearly. Two honest qualifiers before anyone quotes that number back at me. First, almost nobody at that volume pays list: prompt caching (agent and RAG traffic is heavily repetitive), batch APIs, and committed-use discounts routinely take 30–70% off. Second, the API is buying you a frontier model; every owned row below serves open weights. If your use case genuinely needs frontier quality, the comparison ends here.

Option B — Rented GPUs

ShapeWhat you buyBest when
1× H100/H200-classHours of HBM without CapExExperiments, overflow
8× H200-class reservedNode economics without owning the rackSustained serving, still OpEx
8× B200-class on-demandPeak Blackwell without lead timesSpikes; painful if left idle overnight

You own the serving stack (vLLM, SGLang, TRT-LLM). The hyperscaler owns the silicon. Capacity Blocks / reservations change the annual number a lot — DiscreteStack’s reserved B200 math lands far below on-demand. Refresh rates the week you buy; this market moves.

Option C — Own silicon

BuildPlanning CapExAmortized characterBest when
M5 Max 128GB~$5.2–7.3kTiny OpEx, watts winSingle power user
Spark ×1 / ×2 / ×8~$5k → ~$40k+Cluster tax rises fastCUDA lab / capacity demos
Prosumer 256GB/32GB~$5–7kCheap experimentation≤32B daily driver
1× PRO 6000~$12–18kStrong single-card servingTeam inference on one workstation
8× PRO 6000 SE~$135–200kValue multi-GPU nodeSteady production without HBM prices
8× H200 (Lenovo)~$400kHBM workhorseMulti-user, mature stack
8× B200 (Lenovo)~$550kNVFP4 productionFrontier OSS at concurrency
8× B300 (Lenovo)~$785kCapacity-denseLong context / huge MoE
8× MI300XCompetitive vs H200Memory-pool betROCm-ready teams
GB200 NVL72Multi-$MRack-scaleBeyond one chassis

What the sticker price leaves out. Anyone who has run a P&L on this will push back on bare CapEx rows, and they should. Fully loaded, an owned datacenter node also carries:

  • Power and cooling. An 8× H200 node draws ~10kW; 8× B200 closer to 14kW. At $0.10–0.15/kWh running 24/7 that is $9–18k/year in electricity alone, before cooling overhead (PUE) if it is your facility.
  • Space. Colo runs roughly $150–250/kW/month all-in, so a 10kW node is ~$18–30k/year of rack space — often more than the electricity.
  • Support and spares. OEM support contracts, warranty uplift, a spare NIC and drives. Budget low single-digit percent of CapEx per year.
  • People. Someone owns the vLLM upgrades, the CUDA driver matrix, the on-call. Even a fractional SRE (0.25–0.5 FTE) can rival the amortized hardware cost on a single node. This is the line item that quietly decides most build-vs-buy debates.
  • Depreciation horizon. I use 3-year straight-line because that is the conservative planning convention. Stretch to 4–5 years (defensible — H100s are still earning in 2026) and the annual number drops 25–40%. Resale value is real but I would not bank on it.

Owned boxes have near-flat marginal token cost once filled. Empty boxes are just depreciation. The chart below folds power and colo into the owned rows; staffing is excluded everywhere because it varies too much to fake a number.

Inference TCO — APIs vs Rent vs Own

Planning estimates. Lab ≈ 25M tok/day; sustained ≈ 250M tok/day. Owned rows = 3-yr straight-line CapEx + power/colo estimate; all rows exclude staffing. API rows assume the OSS quality bar clears your use case.

API Rent GPU Own silicon

SOTA frontier APIs

$64k / yr

List rates (~$5/M in · $15/M out): $175/day at lab volume, $1,750/day sustained. Prompt caching, batch APIs, and committed-use deals can cut this 30–70% — negotiate before comparing

Net/net: APIs win at bursty low volume. Rent wins when you need HBM without CapEx. Own wins when utilization fills the box and data must stay put. Owned $/token scales inversely with utilization — a box at 20% fill costs 5× per token what these flat rows imply.

Net/net: at lab volume, APIs or a desk box usually win. At sustained production volume, an owned HBM or value Blackwell node beats frontier list pricing on cash — provided utilization is real, open-weight quality clears your bar, and your team can actually run the stack. Weaken any of those three assumptions and the crossover moves right, sometimes past the horizon. Rent sits in the middle for people who need HBM without a CapEx conversation yet.

For the portfolio framing (what to own vs rent as a strategy, not a SKU), see From Renting Tokens to Owning AI Assets and Running Your Own LLM OS.

Decision matrix

JobFirst recommendationAvoid
Personal 70B coding / agentsM5 Max 128GB or 1× PRO 60008-Spark for “speed”
CUDA experimentationSpark ×1 or prosumer 5090-classBuying H200 for a weekend
Team assistant, moderate concurrency1× PRO 6000 or 8× PRO 6000 SECPU offload as the production plan
Regulated / air-gapped, steady volumeLenovo 8× H200 or 8× B200Metered frontier APIs for the sensitive path
Frontier MoE that will not fit one deskDual Spark (capacity) or 8× B200/B300 / MI350XThunderbolt mesh as a latency SLA
Bursty / unknown volumeFrontier or near-frontier APIsCapEx before the utilization story exists
Beyond one chassisGB200 NVL / multi-node HGXPretending PCIe is NVLink

Close

The hardware decision is not “Mac vs NVIDIA vs AMD.” It is which constraint you are buying your way out of: capacity, bandwidth, concurrency, or boundary.

Desk machines made serious local inference normal. Datacenter nodes made it operational. The math did not change — weights plus KV still have to fit, and decode still has to drink from a fast enough memory bus. Get those two right, match the runtime to the silicon, and the CapEx conversation gets honest.

If you want the control-plane and portfolio half of this, start with rent-vs-own. If you want the enterprise stack taxonomy, start with the LLM OS modes series. This post is the silicon half.